Agenda

*The Agenda may be subject to changes
 

MAY 26, 2019 

DAY

#1

08:00-09:00

Registration and Breakfast

Sign in, make yourself a cup of coffee, and meet your fellow engineers.

09:00-09:30

Opening speech

Dudi Tash, CEO , Dgtronix

About the Speaker

09:30-10:00

Essential Design Tips using High Speed Connectors

Dudi Tash, CEO , Dgtronix

About the Speaker

10:00-11:30

Measurement-Based, Harmonic Balance VRM Model

Steve Sandler, Managing Director, Picotest

About the Speaker

11:30-11:45

Break

11:45-12:30

Simulation to Measurement Challenges on PAM4 for 400GB

Hee-Soo Lee, Product owner, Keysight Technologies

About the Speaker 

12:30-13:30

Lunch

13:30-15:00

Typical Cavity Resonators in PCBs and their Impact on Signal and Power Integrity

Dror Haviv, Signal/Power Integrity and Electromagnetism Specialist, Rafael

About the Speaker 

15:00-15:15

Break

SerDes Channel Design and Characterization

Danilo Di Febo, SIMULIA Solution Consultant Specialist, Dassault Systems

About the Speaker 

 

15:15-16:00

16:00-16:45

The Return Loss (RL) evolution - Effective Return Loss (ERL) to substitute RL

Liav Ben-Artsi, Staff Signal Integrity Manager, Marvell

About the speaker | 

MAY 27, 2019 

DAY

#2

08:00-09:00

Registration and Breakfast

Sign in, make yourself a cup of coffee, and meet your fellow engineers.

09:00-09:30

Opening speech

Dudi Tash, CEO , Dgtronix

About the Speaker

09:30-11:00

Power Related Noise in Distributed Systems

Steve Sandler, Managing Director, Picotest

About the Speaker 

11:00-11:15

Break

11:15-12:00

A Practical Guide to Signal Integrity: From Simulation to Measurement

Mike Resso, Signal Integrity Application Scientist , Keysight Technologies

About the Speaker |

12:00-12:45

Distributed Decoupling Capacitors Application for PDN Designs of Fine Pitch BGA Products

Alex Manukovsky, Technical lead of the Signal & Power Integrity, Intel 

Shimon Mordooch, R&D Project Manager, Harmonic Video Networks

Amiram Jibly, System Design Technical lead at the Network ASIC group , Intel

Igal Fridman, Hardware Engineer , Major Technology Company

About Alex Manukovsk

12:45-13:45

Lunch

13:45-15:15

Deep dive into the SerDes compliance requirements, modeling and analysis methods of the most popular protocol

Cristian Filip, Product Architect High-Speed Analysis Products, Mentor Graphics

About the Speaker |

15:15-15:30

Break

15:30-17:00

Understanding the PCI Express 4.0/5.0 Test Methodologies and Measurement Challenges

Dan Froelich,Director of Systems Engineering and Domain Expert, PCIe, Tektronix

About the speaker

17:00-17:15

Lottery & Summary